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(parent: 8d81296) | patch
powerpc: Expose TSCR via sysfs
authorAnton Blanchard <anton@samba.org>
Thu, 7 Sep 2017 17:11:12 +0000 (03:11 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 21 Jan 2018 18:48:36 +0000 (05:48 +1100)
commitb6d34eb4d280c893d0f442f4b9e039d73e3db420
tree5dec89635915a9a52d2b76d4a5888994181e7da3tree | snapshot
parent8d81296cfcce89013a714feb8d25004a156f8181commit | diff
powerpc: Expose TSCR via sysfs

The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/kernel/sysfs.c diff | blob | history
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