drm/i915/cx0: Remove bus reset after every c10 transaction
authorClint Taylor <clinton.a.taylor@intel.com>
Mon, 28 Oct 2024 19:30:11 +0000 (12:30 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 29 Oct 2024 14:36:34 +0000 (07:36 -0700)
commitb66a028a825a217e20657d12aea6f3b60ecd7250
tree4186fae2f7645fbee65f02966900fd7b3013ab8c
parent55371ac67054cb90727f55dc885eac39a65b1dac
drm/i915/cx0: Remove bus reset after every c10 transaction

C10 phy timeouts occur on xe3lpd if the c10 bus is reset every
transaction. Although not required by BSPEC bus resets were added for
prior platforms as a workaround. Starting with xe3_lpd this bus reset is
not necessary.

Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241028193015.3241858-6-clinton.a.taylor@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c