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RDMA/mlx5: Remove mlx5_ib_mr->order
authorJason Gunthorpe <jgg@nvidia.com>
Mon, 26 Oct 2020 13:19:30 +0000 (15:19 +0200)
committerJason Gunthorpe <jgg@nvidia.com>
Mon, 2 Nov 2020 18:31:40 +0000 (14:31 -0400)
commitb4d031cdae1301a8e5e9dba2a862ef028717cb17
treeb7805da0b6c5d8ea2ca7f45068e27e01480ee9b2tree | snapshot
parente28bf1f03b01b135dc0052b3a195c2860e10f216commit | diff
RDMA/mlx5: Remove mlx5_ib_mr->order

The is only ever set to non-zero if the MR is from the cache, and if it is
cached then the order is in cached_ent->order.

Make it clearer that use_umr_mtt_update() only returns true for cached MRs
and remove the redundant data.

Link: https://lore.kernel.org/r/20201026131936.1335664-2-leon@kernel.org
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
drivers/infiniband/hw/mlx5/mlx5_ib.h diff | blob | history
drivers/infiniband/hw/mlx5/mr.c diff | blob | history
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