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(parent: 696ab9b) | patch
soc: sifive: ccache: define the macro for the register shifts
authorZong Li <zong.li@sifive.com>
Tue, 13 Sep 2022 06:18:16 +0000 (06:18 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 13 Oct 2022 18:06:55 +0000 (11:06 -0700)
commitafc7a5834f0de13aee46df62f09e479c1bbf7b9d
tree59545e740c8bd6e4d0077132ec8f178164f9a10btree
parent696ab9bda22a770d079dc3a23bac9aaa553d98f4commit | diff
soc: sifive: ccache: define the macro for the register shifts

Define the macro for the register shifts, it could make the code be
more readable

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220913061817.22564-7-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
drivers/soc/sifive/sifive_ccache.c diff | blob | history
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