drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses
authorImre Deak <imre.deak@intel.com>
Thu, 21 Apr 2022 16:22:21 +0000 (19:22 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 25 Apr 2022 11:45:33 +0000 (14:45 +0300)
commitaf2cbc6ef967f61711a3c40fca5366ea0bc7fecc
treeec580bb1f2c4fd1685774038c6efd84c8103ebba
parent1e1d2e185358b9383807ccfc30f51b642ebe3b8a
drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses

Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address.

Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v5.9+
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220421162221.2261895-1-imre.deak@intel.com
drivers/gpu/drm/i915/i915_reg.h