PCI: mediatek-gen3: Add support for setting max-link-speed limit
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Mon, 4 Nov 2024 11:49:34 +0000 (12:49 +0100)
committerKrzysztof Wilczyński <kwilczynski@kernel.org>
Mon, 4 Nov 2024 16:52:46 +0000 (16:52 +0000)
commitade7da14954a5d1003ceb316a230189c445ba357
treec6629e4a239fc604f36f7aa8660048a1794405d4
parent9852d85ec9d492ebef56dc5f229416c925758edc
PCI: mediatek-gen3: Add support for setting max-link-speed limit

Add support for respecting the max-link-speed devicetree property,
forcing a maximum speed (Gen) for a PCI-Express port.

Since the MediaTek PCIe Gen3 controllers also expose the maximum
supported link speed in the PCIE_BASE_CFG register, if property
max-link-speed is specified in devicetree, validate it against the
controller capabilities and proceed setting the limitations only
if the wanted Gen is lower than the maximum one that is supported
by the controller itself (otherwise it makes no sense!).

Link: https://lore.kernel.org/r/20241104114935.172908-2-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
[kwilczynski: change dev_dbg() to dev_info() and update message wording]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
drivers/pci/controller/pcie-mediatek-gen3.c