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(parent: a76be7b) | patch
drm/amdgpu: fix the fw size for sdma
authorLikun Gao <Likun.Gao@amd.com>
Tue, 12 Apr 2022 20:57:45 +0000 (16:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 May 2022 14:43:54 +0000 (10:43 -0400)
commitaca670e41f9fe52176040553f174d517cbd69da9
treef7849140a346ee01cca698324aebfe6200984b87tree | snapshot
parenta76be7bbc3d7213e2e5ef9cbfa397c3ef48fb8b9commit | diff
drm/amdgpu: fix the fw size for sdma

For SDMA, if use the total size of SDMA TH0 and TH1 to allocate fw BO
may result to the ucode data overflow when copy ucode to BO as the PAGE
alignment.
IMU have the same issue.
Fix the above issue by alignment the fw size per fw ID.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c diff | blob | history
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