drm/amd/display: Fix eDP receiver ready status check in T7 sequence
authorSung-huai Wang <Danny.Wang@amd.com>
Tue, 21 Apr 2026 04:53:56 +0000 (12:53 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 18 May 2026 22:21:48 +0000 (18:21 -0400)
commitab5c6213cfd5fdc1c023002b5b7226adc65d91c4
treed318a4375554b7c91a58d5692048c63d35b215df
parent67fb68996cb517bda9c2f27f8a33872ecbef5b25
drm/amd/display: Fix eDP receiver ready status check in T7 sequence

[Why]
Some eDP panels return sinkstatus as 0x5, causing the original sinkstatus == 1
check to never match and resulting in unnecessary polling delay. The
equality check is too restrictive and doesn't properly validate the
specific status bit that indicates receiver readiness.

[How]
Replace direct value comparison with proper bitmask check using
DP_RECEIVE_PORT_0_STATUS constant.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Sung-huai Wang <Danny.Wang@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c