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(parent: f69e98a) | patch
drm/amd/display: DAL ACR, dc part, fix missing dcn30
authorIan Chen <ian.chen@amd.com>
Mon, 10 May 2021 04:17:26 +0000 (12:17 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jun 2022 01:38:40 +0000 (21:38 -0400)
commita34136a3b3526369e1b3e678590e3760e7653f0f
tree3f4c5569287bac050a9dcf6dd14a40699cce993atree
parentf69e98a91a01fd7c5755dd710e94a17d6e9f583fcommit | diff
drm/amd/display: DAL ACR, dc part, fix missing dcn30

[Why]
- missing in dcn30 function
- Fix a divide by 0 when ACR trigger

[How]
- Add IS_SMU_TIMEOUT() to dcn30_smu_send_msg_with_param
- Add zero check in dcn20_update_clocks_update_dentist

Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Ian Chen <ian.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c diff | blob | history
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c diff | blob | history
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