drm/amdgpu: Prevent race between late signaled fences and GPU reset.
authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Sat, 18 Jun 2022 04:28:50 +0000 (00:28 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 Jun 2022 15:24:24 +0000 (11:24 -0400)
commit9e225fb9e636b31b97e9d35324c2f9e43ee0aab4
treedb11cbf1b0a3178c35713bf3817304b3e2a74f60
parentdd70748eda3f63217d5284f48651239a9721245e
drm/amdgpu: Prevent race between late signaled fences and GPU reset.

Problem:
After we start handling timed out jobs we assume there fences won't be
signaled but we cannot be sure and sometimes they fire late. We need
to prevent concurrent accesses to fence array from
amdgpu_fence_driver_clear_job_fences during GPU reset and amdgpu_fence_process
from a late EOP interrupt.

Fix:
Before accessing fence array in GPU disable EOP interrupt and flush
all pending interrupt handlers for amdgpu device's interrupt line.

v2: Switch from irq_get/put to full enable/disable_irq for amdgpu

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h