clk: renesas: r8a77995: Add RPC clocks
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 29 Mar 2022 09:44:26 +0000 (11:44 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 11 Apr 2022 10:13:13 +0000 (12:13 +0200)
commit9d18f81b35355f63a39b04869d0a013194925d1a
tree356aa275e43183384d081204a83f2feda3ccd902
parent2a214607e4a335f9ebfb08ae3bf7f2c905a0c9c9
clk: renesas: r8a77995: Add RPC clocks

Describe the various clocks used by the SPI Multi I/O Bus Controller
(RPC-IF) on the R-Car D3 SoC: RPCSRC internal clock, RPC{,D2} clocks
derived from it, and RPC-IF module clock.

The RPCSRC clock divider on R-Car D3 is very similar to the one on R-Car
E3, but uses a different pre-divider for the PLL0 parent.  Add a new
macro to describe it, reusing the existing clock type for R-Car E3.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/3fd1e886b7737cd0e199603bae81d01be9dcf3aa.1648546700.git.geert+renesas@glider.be
drivers/clk/renesas/r8a77995-cpg-mssr.c
drivers/clk/renesas/rcar-gen3-cpg.h