media: platform: rzg2l-cru: rzg2l-ip: Add delay after D-PHY reset
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 13 Feb 2024 18:12:30 +0000 (18:12 +0000)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Thu, 15 Feb 2024 09:57:54 +0000 (10:57 +0100)
commit9c7fa014ca320b0eb95062922a73563aa9734cd0
tree147ff8846465dc5ce3d82071ebffb2652d69f8f5
parentf243df0a0be0bee39d60136a8f2d1616c63deb1c
media: platform: rzg2l-cru: rzg2l-ip: Add delay after D-PHY reset

As per section 35.3.1 Starting Reception for the MIPI CSI-2 Input on the
latest hardware manual (R01UH0914EJ0140 Rev.1.40) it is mentioned that
after DPHY reset, we need to wait for 1 msec or more before start
receiving data from the sensor. So add a delay after pre_streamon().

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20240213181233.242316-3-biju.das.jz@bp.renesas.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c