projects / linux-2.6-microblaze.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 37b9932) | patch
drm/amdgpu/gfx9: set additional bits on CP halt
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 16 Sep 2024 17:16:53 +0000 (13:16 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 26 Sep 2024 21:06:18 +0000 (17:06 -0400)
commit993fcc40ae7365fa664e2ec874e2e3933b773376
tree17649eae8a129444f259f7113472038d679da739tree
parent37b993225d37744f2a62bf67074a76a6cb7b8b98commit | diff
drm/amdgpu/gfx9: set additional bits on CP halt

Need to set the pipe reset and cache invalidation bits
on halt otherwise we can get stale state if the CP firmware
changes (e.g., on module unload and reload).

Reviewed-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c diff | blob | history
MicroBlaze GIT Repository