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(parent: 81a9d3b) | patch
dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
authorPeng Fan <peng.fan@nxp.com>
Mon, 7 Feb 2022 01:52:09 +0000 (09:52 +0800)
committerJassi Brar <jaswinder.singh@linaro.org>
Sun, 13 Mar 2022 01:27:02 +0000 (19:27 -0600)
commit960dcc1574c7432ad4ff42e8b153f098bdfd5c8d
treef84e5947f9a5fcdcf96e1e2686148ceeb9af582dtree | snapshot
parent81a9d3b9301c9bb835d8ef595b2456084573db1bcommit | diff
dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support

Similar to i.MX8QM/QXP SCU, i.MX8 SECO MU is dedicated for
communication between SECO and Cortex-A cores from hardware design,
it could not be reused for other purpose. To use SECO MU more
effectivly, add "fsl,imx8-mu-seco" compatile to support fast IPC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml diff | blob | history
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