drm/amdgpu/gfx10: add mes queue fence handling
authorJack Xiao <Jack.Xiao@amd.com>
Fri, 20 Mar 2020 04:37:49 +0000 (12:37 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 May 2022 14:43:49 +0000 (10:43 -0400)
commit954e0a72b4220cba6bfcf50a3f13ed29f233b170
treeb3d0f11dbf5bc1da6286e54ec5935a0bcb7bfc97
parent207e8bbe667fa1368155bae8d0e92041a4c1c079
drm/amdgpu/gfx10: add mes queue fence handling

From IH ring buffer, look up the coresponding kernel queue and process.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c