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(parent: 3bc3d30) | patch
platform/x86: ISST: Allow additional TRL MSRs
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Thu, 5 Sep 2019 23:37:47 +0000 (16:37 -0700)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Mon, 9 Sep 2019 10:19:35 +0000 (13:19 +0300)
commit92e0e87d0be5eb192fab1edb9b44e724c63416ce
treed35c7831e8dc939d40fe8fcd4a45999d9b5dcf62tree | snapshot
parent3bc3d30ca324bfc3045a1a7fe1f5fe5ad5d92fd9commit | diff
platform/x86: ISST: Allow additional TRL MSRs

Additional Turbo Ratio Limit (TRL) MSRs are required to get bucket vs core
count relationship. So add them to the list of allowed MSRs.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
drivers/platform/x86/intel_speed_select_if/isst_if_common.c diff | blob | history
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