drm/i915/adlp+/dp_mst: Align slave transcoder sequences with spec wrt. DP2 config
authorImre Deak <imre.deak@intel.com>
Wed, 30 Oct 2024 19:23:12 +0000 (21:23 +0200)
committerImre Deak <imre.deak@intel.com>
Wed, 6 Nov 2024 16:13:36 +0000 (18:13 +0200)
commit90477f0dfd8881d2336ed3c7fd166bdc4c924e05
treeb66bacd8c926ef9695753c4333c1299b1ef003ee
parent4dc776627602ae57de1dfac249fcfefb73983a80
drm/i915/adlp+/dp_mst: Align slave transcoder sequences with spec wrt. DP2 config

On ADLP+ during modeset enabling and disabling, enable and disable the DP2
configuration for MST slave transcoders as required by the specification.

Update the documentation of intel_ddi_config_transcoder_func() /
intel_ddi_disable_transcoder_func() based on the above. While at it also
clarify the programming steps of these functions specific to transcoder
types.

v2:
- Enable/disable the DP2 config from
  intel_ddi_config_transcoder_func()/intel_ddi_disable_transcoder_func().
  (Jani)
- Handle all ADLP+ platforms in one patch, instead of doing that
  separately wrt. PTL.

Bspec: 55424, 54128, 65448, 68849
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030192313.4030617-5-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c