drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 3 Feb 2020 09:41:49 +0000 (09:41 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 3 Feb 2020 11:27:17 +0000 (11:27 +0000)
commit8faa72511bb844fc1079aaebe786580205d27d86
tree4807bf82a450a3f1233aeaba09c6d2f6527cdee4
parent855e39e65cfc33a73724f1cc644ffc5754864a20
drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno

On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.

To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush the GGTT in emergencies, we will
likely need to lift the next-cacheline allocation to a pre-reservation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200203094152.4150550-3-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_timeline.c