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(parent: 5a4487f) | patch
x86/perf: Avoid warning for Arch LBR without XSAVE
authorAndi Kleen <ak@linux.intel.com>
Wed, 15 Dec 2021 20:40:29 +0000 (12:40 -0800)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 18 Jan 2022 11:09:49 +0000 (12:09 +0100)
commit8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc
treefda5f034b2e7c8d18ee79a72d1c09a239ab88aaftree | snapshot
parent5a4487f9ef5ef2fdb3215cadf0a9c3e5e8678634commit | diff
x86/perf: Avoid warning for Arch LBR without XSAVE

Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
arch/x86/events/intel/lbr.c diff | blob | history
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