dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Mon, 4 Aug 2025 20:26:42 +0000 (21:26 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 11 Aug 2025 13:47:03 +0000 (15:47 +0200)
commit8a5a0294f40a50e5be83e9b7ebbc15b546f64e41
tree4f3a5c7e1a3d8bfb07851a2b3cbefdf3f19e037a
parent8f5ae30d69d7543eee0d70083daf4de8fe15d585
dt-bindings: clock: renesas,r9a09g077/87: Add USB_CLK clock ID

Add the USB clock (USB_CLK) definition for the Renesas RZ/T2H
(R9A09G077) and RZ/N2H (R9A09G087) SoCs.  USB_CLK is used as the
reference clock for USB PHY layer.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250804202643.3967484-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h
include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h