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(parent: 982ee94) | patch
drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5
authorDave Stevenson <dave.stevenson@raspberrypi.com>
Wed, 7 Dec 2022 11:53:15 +0000 (12:53 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Mon, 9 Jan 2023 14:21:30 +0000 (15:21 +0100)
commit87551ec650bb87d35f1b29bba6a2430896e08da0
tree2e72db976329d769ea22a71b43ad432046f3da99tree | snapshot
parent982ee94486863a41c6af9f2ab3f6681f72bc5c48commit | diff
drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5

HVS5 has moved the interrupt enable bits around within the
DISPCTRL register, therefore the configuration has to be updated
to account for this.

Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-4-1f8e0770798b@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
drivers/gpu/drm/vc4/vc4_hvs.c diff | blob | history
drivers/gpu/drm/vc4/vc4_regs.h diff | blob | history
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