arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
authorSimon Horman <horms+renesas@verge.net.au>
Mon, 29 Jul 2019 08:03:56 +0000 (10:03 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Aug 2019 13:29:27 +0000 (15:29 +0200)
commit8703ba77ec555b08c538beb728a4df1b72e0213e
treeda2fa7666c500309093234fd8c413f48e719ddc9
parente77ad88d0c6228af65d0a0d49b264c2fb249afcf
arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps

* According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
  August 24, 2018, the TX clock internal delay mode isn't supported
  on R-Car E3 (r8a77990) and D3 (r8a77995).

* TX clock internal delay mode is required for reliable 1Gbps communication
  using the KSZ9031RNX phy present on the Ebisu and Draak boards.

Thus, the E3 based Ebisu and D3 based Draak boards can not reliably
use 1Gbps and the speed should be limited to 100Mbps.

Based on work by Kazuya Mizuguchi.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
arch/arm64/boot/dts/renesas/r8a77995-draak.dts