cxl: Split out host bridge access coordinates
authorDave Jiang <dave.jiang@intel.com>
Fri, 8 Mar 2024 21:59:25 +0000 (14:59 -0700)
committerDan Williams <dan.j.williams@intel.com>
Tue, 12 Mar 2024 19:34:11 +0000 (12:34 -0700)
commit863027d40993f13155451bd898bfe4c4e9b7002f
treeaf7a3fcc96e70c3fab188549b828b55e740dde71
parent032f7b37adff6985e22516053698b77131c2ce96
cxl: Split out host bridge access coordinates

The difference between access class 0 and access class 1 for 'struct
access_coordinate', if any, is that class 0 is for the distance from
the target to the closest initiator and that class 1 is for the distance
from the target to the closest CPU. For CXL memory, the nearest initiator
may not necessarily be a CPU node. The performance path from the CXL
endpoint to the host bridge should remain the same. However, the numbers
extracted and stored from HMAT is the difference for the two access
classes. Split out the performance numbers for the host bridge (generic
target) from the calculation of the entire path in order to allow
calculation of both access classes for a CXL region.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20240308220055.2172956-7-dave.jiang@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/cdat.c
drivers/cxl/core/port.c
drivers/cxl/cxl.h