clk: iproc: Fix error in the pll post divider rate calculation
authorLori Hikichi <lori.hikichi@broadcom.com>
Mon, 14 Aug 2017 19:00:39 +0000 (12:00 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 28 Dec 2017 22:53:34 +0000 (14:53 -0800)
commit85151a6b0b331f7bc4d9534d6138bfdd3e206b0d
tree641aa0820acb441ee4a6633527fea365b9a5885f
parentbecf123772a9ef15823a3f495478fe68e45b5028
clk: iproc: Fix error in the pll post divider rate calculation

The pll post divider code was using DIV_ROUND_UP when determining the
divider value best suited to produce the target frequency.
Using DIV_ROUND_CLOSEST will give us better divider values when
the division results in a small remainder.
Also, change the post divider clock over to the determine_rate api
instead of round_rate.

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/bcm/clk-iproc-pll.c