scsi: hisi_sas: use threaded irq to process CQ interrupts
authorXiang Chen <chenxiang66@hisilicon.com>
Mon, 20 Jan 2020 12:22:31 +0000 (20:22 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 21 Jan 2020 00:31:13 +0000 (19:31 -0500)
commit81f338e9709db0b67d05bab02809d6a4e6694884
treeae10d8b3d29bce523d21651f06b4db5d85d4d63e
parent1baa80118e0324bf5063c2576b531a14cb57f874
scsi: hisi_sas: use threaded irq to process CQ interrupts

Currently IRQ_EFFECTIVE_AFF_MASK is enabled for ARM_GIC and ARM_GIC3, so it
only allows a single target CPU in the affinity mask to process interrupts
and also interrupt thread, and the performance of using threaded irq is
almost the same as tasklet. But if the config is not enabled, the interrupt
thread will be allowed all the CPUs in the affinity mask. At that situation
it improves the performance (about 20%).

Note: IRQ_EFFECTIVE_AFF_MASK is configured differently for different
architecture chip, and it seems to be better to make it be configured
easily.

Link: https://lore.kernel.org/r/1579522957-4393-2-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/hisi_sas/hisi_sas.h
drivers/scsi/hisi_sas/hisi_sas_main.c
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c