riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader
authorE Shattow <e@freeshell.de>
Sat, 23 Aug 2025 10:01:43 +0000 (03:01 -0700)
committerConor Dooley <conor.dooley@microchip.com>
Thu, 4 Sep 2025 17:57:30 +0000 (18:57 +0100)
commit8181cc2f3f21657392da912eb20ee17514c87828
tree328e430cc12d088e5ad5194ce29548026c9d079c
parent7114969021ec5c4c0f3df1da3a8790f75dda92e2
riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader

Add bootph-pre-ram hinting to jh7110.dtsi:
  - CPU interrupt controller(s)
  - gmac1_rgmii_rxin fixed-clock (dependency of syscrg)
  - gmac1_rmii_refin fixed-clock (dependency of syscrg)
  - oscillator
  - core local interrupt timer
  - syscrg clock-controller
  - pllclk clock-controller (dependency of syscrg)
  - DDR memory controller

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi