clk: sunxi-ng: a83t: Add M divider to TCON1 clock
authorJernej Škrabec <jernej.skrabec@siol.net>
Sat, 30 Dec 2017 21:01:54 +0000 (22:01 +0100)
committerChen-Yu Tsai <wens@csie.org>
Wed, 3 Jan 2018 05:45:04 +0000 (13:45 +0800)
commit7dbc7f5f4904cfddc199af171ea095490a434f15
tree0e8b3a79fe339717b8aea4ceae21e479576f7877
parentcf4881c1293516c1975606e8f2af7948789168b8
clk: sunxi-ng: a83t: Add M divider to TCON1 clock

TCON1 also has M divider, contrary to TCON0. And the mux is only
2 bits wide, instead of 3.

Fixes: 05359be1176b ("clk: sunxi-ng: Add driver for A83T CCU")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[wens@csie.org: Add description about mux width difference]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
drivers/clk/sunxi-ng/ccu-sun8i-a83t.c