drm/i915: Prepare for larger CSB status FIFO size
authorMika Kuoppala <mika.kuoppala@linux.intel.com>
Fri, 5 Apr 2019 20:46:56 +0000 (21:46 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 11 Apr 2019 08:20:04 +0000 (09:20 +0100)
commit7d4c75d9097a0031b0aabf0bbc127ae7dcf93de3
tree061b87d6eba817b06c370ceb18e3f2537ac7f4ce
parent917dc6b53c273dd7e026f158ad4894ae366da326
drm/i915: Prepare for larger CSB status FIFO size

Make csb entry count variable in preparation for larger
CSB status FIFO size found on gen11+ hardware.

v2: adapt to hwsp access only (Chris)
    non continuous mmio (Daniele)
v3: entries (Chris), fix macro for checkpatch
v4: num_entries (Chris)
v5: consistency on num_entries

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190405204657.12887-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_engine_cs.c
drivers/gpu/drm/i915/intel_engine_types.h
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/intel_lrc.h