ASoC: fsl_utils: Add function to handle PLL clock source
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 1 Jul 2022 09:32:36 +0000 (17:32 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 5 Jul 2022 12:00:37 +0000 (13:00 +0100)
commit7bad8125549cda14d9ccf97d7d76f7ef6ac9d206
tree611a16eb31aa6dc6a87465399dd92d05ba3f6750
parentacf981f94edca13c85fa24dd8511cdc6bd4c98ed
ASoC: fsl_utils: Add function to handle PLL clock source

i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being
configured to handle 8kHz and 11kHz series audio rates.
Add common function in fsl_utils to handle these two PLL
clock source, which are needed by CPU DAI drivers

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1656667961-1799-2-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_utils.c
sound/soc/fsl/fsl_utils.h