arm64: tegra: Fix GIC400 missing GICH/GICV register regions
authorMarc Zyngier <maz@kernel.org>
Mon, 5 Oct 2020 13:32:56 +0000 (14:32 +0100)
committerThierry Reding <treding@nvidia.com>
Wed, 25 Nov 2020 14:33:33 +0000 (15:33 +0100)
commit776a3c04da9fa144241476f4a0d263899d6cad26
tree518ee56f7161ff6ed46f77e209105541390e1b7b
parent3b4c137856d94f94231415793f45a104a19c3604
arm64: tegra: Fix GIC400 missing GICH/GICV register regions

GIC400 has full support for virtualization, and yet the tegra186
DT doesn't expose the GICH/GICV regions (despite exposing the
maintenance interrupt that only makes sense for virtualization).

Add the missing regions, based on the hunch that the HW doesn't
use the CPU build-in interfaces, but instead the external ones
provided by the GIC. KVM's virtual GIC now works with this change.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra186.dtsi