powerpc/pmem: Update ppc64 to use the new barrier instruction.
authorAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Wed, 1 Jul 2020 07:22:33 +0000 (12:52 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 16 Jul 2020 03:00:23 +0000 (13:00 +1000)
commit76e6c73f33d4e1cc4de4f25c0bf66d59e42113c4
treec76d88ed281803424e6ed5b2635874209af25889
parent3e79f082ebfc130360bcee23e4dd74729dcafdf4
powerpc/pmem: Update ppc64 to use the new barrier instruction.

pmem on POWER10 can now use phwsync instead of hwsync to ensure
all previous writes are architecturally visible for the platform
buffer flush.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200701072235.223558-6-aneesh.kumar@linux.ibm.com
arch/powerpc/include/asm/barrier.h