drm/i915: Fix VIDEO_DIP_CTL bit shifts
authorDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Fri, 5 Oct 2018 18:56:42 +0000 (11:56 -0700)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Tue, 6 Nov 2018 15:17:31 +0000 (17:17 +0200)
commit76271ef2638ca8e4bf2884cad664a34be0d5a42b
tree9da4c7119b606f2fc1a3df67140caa2fd3b296c3
parent2c2f6e30d5f29691e3563d334ce208d3a1907f49
drm/i915: Fix VIDEO_DIP_CTL bit shifts

The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
definitions are unused.

v2: Moves definitions in another patch (Manasi)
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181005185643.31660-1-dhinakaran.pandiyan@intel.com
(cherry picked from commit 09209662618f9fdc38b8d4da39040c8829fd2d57)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/i915_reg.h