mm/mglru: add CONFIG_ARCH_HAS_HW_PTE_YOUNG
authorKinsey Ho <kinseyho@google.com>
Wed, 27 Dec 2023 14:12:01 +0000 (14:12 +0000)
committerAndrew Morton <akpm@linux-foundation.org>
Fri, 5 Jan 2024 18:17:44 +0000 (10:17 -0800)
commit71ce1ab54a505736786d9c5921e6c2718c7ec535
treede4090fee7d620e332f05c183b9cbe6138ee26e3
parent9c5938694cd0e9e00bdfb7e60900673263daf4d5
mm/mglru: add CONFIG_ARCH_HAS_HW_PTE_YOUNG

Patch series "mm/mglru: Kconfig cleanup", v4.

This series is the result of the following discussion:
https://lore.kernel.org/47066176-bd93-55dd-c2fa-002299d9e034@linux.ibm.com/

It mainly avoids building the code that walks page tables on CPUs that
use it, i.e., those don't support hardware accessed bit. Specifically,
it introduces a new Kconfig to guard some of functions added by
commit bd74fdaea146 ("mm: multi-gen LRU: support page table walks")
on CPUs like POWER9, on which the series was tested.

This patch (of 5):

Some architectures are able to set the accessed bit in PTEs when PTEs
are used as part of linear address translations.

Add CONFIG_ARCH_HAS_HW_PTE_YOUNG for such architectures to be able to
override arch_has_hw_pte_young().

Link: https://lkml.kernel.org/r/20231227141205.2200125-1-kinseyho@google.com
Link: https://lkml.kernel.org/r/20231227141205.2200125-2-kinseyho@google.com
Signed-off-by: Kinsey Ho <kinseyho@google.com>
Co-developed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Tested-by: Donet Tom <donettom@linux.vnet.ibm.com>
Acked-by: Yu Zhao <yuzhao@google.com>
Cc: kernel test robot <lkp@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
arch/Kconfig
arch/arm64/Kconfig
arch/x86/Kconfig
arch/x86/include/asm/pgtable.h
include/linux/pgtable.h