RISC-V: Add bitmap reprensenting ISA features common across CPUs
authorAnup Patel <anup.patel@wdc.com>
Fri, 24 Apr 2020 04:59:27 +0000 (10:29 +0530)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Mon, 4 May 2020 21:08:59 +0000 (14:08 -0700)
commit6bcff51539ccae5431a01f60293419dbae21100f
tree1caad57d91a4df9f439b568d69c062baf300640f
parent7391efa48d88c8555a802bac562d02a38567127c
RISC-V: Add bitmap reprensenting ISA features common across CPUs

This patch adds riscv_isa bitmap which represents Host ISA features
common across all Host CPUs. The riscv_isa is not same as elf_hwcap
because elf_hwcap will only have ISA features relevant for user-space
apps whereas riscv_isa will have ISA features relevant to both kernel
and user-space apps.

One of the use-case for riscv_isa bitmap is in KVM hypervisor where
we will use it to do following operations:

1. Check whether hypervisor extension is available
2. Find ISA features that need to be virtualized (e.g. floating
   point support, vector extension, etc.)

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpufeature.c