drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 24 Sep 2019 21:00:40 +0000 (14:00 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Wed, 25 Sep 2019 19:13:22 +0000 (12:13 -0700)
commit6677c3b167b3ba9fa183015f6244e2db28d99f29
treeb0490d840831caf827618209c8687eb1002c603b
parentee7de6ad382d8d0fcf5bdb7443c7bc1f55e9d0f5
drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports

TGL added 2 more TC ports that currently are not being handled by
icl_pll_to_ddi_clk_sel(), so adding those.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reported-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190924210040.142075-6-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c