net/mlx5: HWS, num_of_rules counter on matcher should be atomic
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Thu, 2 Jan 2025 18:14:08 +0000 (20:14 +0200)
committerJakub Kicinski <kuba@kernel.org>
Tue, 7 Jan 2025 00:33:40 +0000 (16:33 -0800)
commit61fb92701b8ac9174857c417cfa988adc24e32c2
treecd42a5408caea4f8b5dd93fcdcbdd116cf2a1102
parent05e3c287b98795cf01d829d29841179cef3fb9ce
net/mlx5: HWS, num_of_rules counter on matcher should be atomic

Rule counter in matcher's struct is used in two places:

1. As heuristics to decide when the number of rules have crossed a
certain percentage threshold and the matcher should be resized.
We don't mind here if the number will be off by 1-2 due to concurrency.

2. When destroying matcher, the counter value is checked and the
user is warned if it is not 0. Here we lock all the queues, so the
counter will be correct.

We don't need to always have *exact* number, but we do need this
number to not be corrupted, which is what is happening when the
counter isn't atomic, due to update by different threads.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250102181415.1477316-10-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h