drm/i915: Make the pipe/output CSC register writes lockless
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 2 Feb 2022 11:16:14 +0000 (13:16 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 18 Feb 2022 15:27:31 +0000 (17:27 +0200)
commit61b3b2da10dba0ac1633c699c9d305c702b43720
treecb485d9c0c279c7c6086095c9d0d6853684c8b5a
parentf470b218b0bb7c9bae8aa2b4859d9a6bf97d98d1
drm/i915: Make the pipe/output CSC register writes lockless

The pipe/output CSC register writes don't need to be locked
since all the registers are suitably isolated to their own
cachelines. So eliminate the locks to reduce the overhead
during the vblank evade critical section.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220202111616.1579-2-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
drivers/gpu/drm/i915/display/intel_color.c