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(parent: 2e3d5fa) | patch
stmmac: CSR clock configuration fix
authorjpinto <Joao.Pinto@synopsys.com>
Fri, 23 Dec 2016 10:15:59 +0000 (10:15 +0000)
committerDavid S. Miller <davem@davemloft.net>
Fri, 23 Dec 2016 16:46:37 +0000 (11:46 -0500)
commit567be786597ca24b13906a552ad2159316c6fe7d
tree8ca503b742460caa59d0ccc744a8181f4328533ftree
parent2e3d5fa44f0f6e71ada2c4ed212ac23ca7ff0064commit | diff
stmmac: CSR clock configuration fix

When testing stmmac with my QoS reference design I checked a problem in the
CSR clock configuration that was impossibilitating the phy discovery, since
every read operation returned 0x0000ffff. This patch fixes the issue.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c diff | blob | history
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c diff | blob | history
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c diff | blob | history
MicroBlaze GIT Repository