net/mlx5e: Block offload of outer header csum for GRE tunnel
authorAya Levin <ayal@nvidia.com>
Wed, 26 May 2021 07:40:36 +0000 (10:40 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Thu, 10 Jun 2021 00:20:06 +0000 (17:20 -0700)
commit54e1217b90486c94b26f24dcee1ee5ef5372f832
tree3265de673fbab70d82b813c4a9556cdfab1e61be
parent6d6727dddc7f93fcc155cb8d0c49c29ae0e71122
net/mlx5e: Block offload of outer header csum for GRE tunnel

The device is able to offload either the outer header csum or inner
header csum. The driver utilizes the inner csum offload. So, prohibit
setting of tx-gre-csum-segmentation and let it be: off[fixed].

Fixes: 2729984149e6 ("net/mlx5e: Support TSO and TX checksum offloads for GRE tunnels")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en_main.c