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ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 9 Oct 2013 13:12:39 +0000 (16:12 +0300)
committerPaul Walmsley <paul@pwsan.com>
Thu, 24 Oct 2013 15:07:23 +0000 (09:07 -0600)
commit4ff7e3b65c8e1d8062365296b738fd262cfc2e9c
tree68b7dbcd0779ef82842675754ea16fa7929a08fdtree
parent262c2c9d06585fb0ffc84da18e0f747836ce8bafcommit | diff
ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers

dpll4_m3_ck and dpll4_m4_ck have divider bit fields which are 6 bits
wide. However, only values from 1 to 32 are allowed. This means we have
to add a divider tables and list the dividers explicitly.

I believe the same issue is there for other dpll4_mx_ck clocks, but as
I'm not familiar with them, I didn't touch them.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/cclock3xxx_data.c diff | blob | history
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