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(parent: 4a92fe8) | patch
mmc: msm_sdcc: Use MCI_INT_MASK0 for PIO interrupts
authorSahitya Tummala <stummala@codeaurora.org>
Mon, 2 May 2011 12:39:18 +0000 (18:09 +0530)
committerChris Ball <cjb@laptop.org>
Wed, 26 Oct 2011 19:43:37 +0000 (15:43 -0400)
commit4a268e0879c4044523757b6ac94b56fc7955a116
tree3397cdc9c1d95b215e6094e1629fc3a4e4c1ae30tree
parent4a92fe80becbbee650cfad8457ad0e5cd97ed974commit | diff
mmc: msm_sdcc: Use MCI_INT_MASK0 for PIO interrupts

Not all targets have IRQ1 line routed from the SD controller to
the processor. So we cannot rely on IRQ1 for PIO interrupts.
This patch moves all PIO interrupts to IRQ0 and enables the PIO
mode.

Signed-off-by: Murali Palnati <palnatim@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/msm_sdcc.c diff | blob | history
drivers/mmc/host/msm_sdcc.h diff | blob | history
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