MIPS: SGI-IP28: disable use of ll/sc in kernel
authorThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 7 Oct 2020 10:17:04 +0000 (12:17 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Thu, 8 Oct 2020 08:33:27 +0000 (10:33 +0200)
commit46dd40aa376c8158b6aa17510079caf5c3af6237
tree5f4cb3746c7537b3f1475eaaeada9a9e77244cce
parent43fab0856eafb32d5cdb809d8225197755826128
MIPS: SGI-IP28: disable use of ll/sc in kernel

SGI-IP28 systems only use broken R10k rev 2.5 CPUs, which could lock
up, if ll/sc sequences are issued in certain order. Since those systems
are all non-SMP, we can disable ll/sc usage in kernel.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h