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(parent: ba4caa9) | patch
drm/amd/display: Add ADDR3 swizzle modes
authorWenxian Wang <wenxian.wang@amd.com>
Sat, 9 May 2026 02:46:23 +0000 (10:46 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 19 May 2026 15:45:41 +0000 (11:45 -0400)
commit468b02d3f212b5e528d8a40d06bf26e7f3fb4a64
tree8db346895c40f828d59663c7c1234d97b3ab9990tree
parentba4caa9fecdf7a38f98c878ad05a8a64148b6881commit | diff
drm/amd/display: Add ADDR3 swizzle modes

[Why]
New swizzle modes are needed for ADDR3 block support.

[How]
Add DC_ADDR3_SW_64KB_2D_Z and DC_ADDR3_SW_256KB_2D_Z enum
values to dc_hw_types.h.

Reviewed-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Signed-off-by: Wenxian Wang <wenxian.wang@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_hw_types.h diff | blob | history
drivers/gpu/drm/amd/display/dc/hubbub/dcn401/dcn401_hubbub.c diff | blob | history
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