drm/i915: Widen the QGV point mask
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 14 Feb 2022 09:18:08 +0000 (11:18 +0200)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Mon, 21 Feb 2022 09:37:19 +0000 (09:37 +0000)
commit3f33364836aacc28cd430d22cf22379e3b5ecd77
tree299516419a123a35f9dbbf564eb4b645f0e8162f
parentcfb92440ee71adcc2105b0890bb01ac3cddb8507
drm/i915: Widen the QGV point mask

adlp+ adds some extra bits to the QGV point mask. The code attempts
to handle that but forgot to actually make sure we can store those
bits in the bw state. Fix it.

Cc: stable@vger.kernel.org
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fixes: 192fbfb76744 ("drm/i915: Implement PSF GV point support")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220214091811.13725-4-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
(cherry picked from commit c0299cc9840b3805205173cc77782f317b78ea0e)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
drivers/gpu/drm/i915/display/intel_bw.h