ARM: rockchip: add basic smp support for rk3288
authorKever Yang <kever.yang@rock-chips.com>
Wed, 15 Oct 2014 17:23:03 +0000 (10:23 -0700)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 5 Nov 2014 21:18:40 +0000 (22:18 +0100)
commit3ee851e212d0bb6be8c462059fba74ce2e3f6064
treeabf38ddb77760e6390ed3982f4067500cfd75a37
parent6de2d21adaf05b7a456077625b6e311feabd3718
ARM: rockchip: add basic smp support for rk3288

This patch add basic rk3288 smp support.

Only cortex-A9 need invalid L1, A7/A12/A15/A17 should not invalid L1, since
for A7/A12/A15, the invalidation would be taken as clean and invalidate.

If you use the software manual invalidation instead of hardware invalidation
(assert l1/l2rstdisable during reset) after reset, there is tiny change that
some cachelines would be in dirty and valid state after reset(since the ram
content would be random value after reset), then the unexpected clean might
lead to system crash.

It is a known issue for the A12/A17 MPCore multiprocessor that the active
processors might be stalled when the individual processor is powered down,
we can avoid this prolbem by softreset the processor before power it down.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/mach-rockchip/headsmp.S
arch/arm/mach-rockchip/platsmp.c