ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:29:00 +0000 (22:29 +0100)
committerKrzysztof Kozlowski <krzk@kernel.org>
Tue, 29 Dec 2020 15:44:55 +0000 (16:44 +0100)
commit3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9
tree7becadba99818e67a47911e9b10676112ce4442a
parent1ac8893c4fa3d4a34915dc5cdab568a39db5086c
ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-6-krzk@kernel.org
arch/arm/boot/dts/exynos5422-odroid-core.dtsi