drm/i915/selftests: Test RING_TIMESTAMP on gen4/5
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 31 Oct 2022 13:57:02 +0000 (15:57 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 2 Nov 2022 06:54:59 +0000 (08:54 +0200)
commit38530a37de499bbb6244018d8d515995fbd89441
tree351668698758e4861ef31cd17598cda9a3aa6de7
parentcf8a82de21c0d2a4e74c159f8479eb1a742ec519
drm/i915/selftests: Test RING_TIMESTAMP on gen4/5

Now that we actually know the cs timestamp frequency on gen4/5
let's run the corresponding test.

On g4x/ilk we must read the udw of the 64bit timestamp
register. Details in {g4x,gen5)_read_clock_frequency().

The one extra caveat is that on i965 (or at least CL, don't
recall if I ever tested on BW) we must read the register
twice to get an up to date value. For some unknown reason
the first read tends to return a stale value.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221031135703.14670-6-ville.syrjala@linux.intel.com
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
drivers/gpu/drm/i915/gt/selftest_gt_pm.c