drm/i915: Fix MOCS PTE setting for gen9+
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 15 Oct 2020 12:21:36 +0000 (13:21 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 15 Oct 2020 14:38:20 +0000 (15:38 +0100)
commit36b6b6816989cf6f468eea82694e83211a066fa4
tree470b5e62249ccf24aaff18ca9874a43d6b91b148
parentd46b60a2e8d246f1f0faa38e52f4f5a73858c338
drm/i915: Fix MOCS PTE setting for gen9+

Fix up the MOCS PTE setting to really get the LLC cacheability
from the PTE rather than hardocoding it to LLC or LLC+eLLC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201007120329.17076-2-ville.syrjala@linux.intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20201015122138.30161-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_mocs.c