perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation
authorAdrian Hunter <adrian.hunter@intel.com>
Mon, 24 Jun 2024 20:10:57 +0000 (23:10 +0300)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 4 Jul 2024 14:00:21 +0000 (16:00 +0200)
commit3520b251dcae2b4a27b95cd6f745c54fd658bda5
tree8d4339ee1cf737f5021b17c2332876f9a4816b7b
parentad97196379d0b8cb24ef3d5006978a6554e6467f
perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation

Currently, perf allocates an array of page pointers which is limited in
size by MAX_PAGE_ORDER. That in turn limits the maximum Intel PT buffer
size to 2GiB. Should that limitation be lifted, the Intel PT driver can
support larger sizes, except for one calculation in
pt_topa_entry_for_page(), which is limited to 32-bits.

Fix pt_topa_entry_for_page() address calculation by adding a cast.

Fixes: 39152ee51b77 ("perf/x86/intel/pt: Get rid of reverse lookup table for ToPA")
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20240624201101.60186-4-adrian.hunter@intel.com
arch/x86/events/intel/pt.c