clk: jz4725b: fix mmc0 clock gating
authorSiarhei Volkau <lis8215@gmail.com>
Sat, 5 Feb 2022 17:18:49 +0000 (20:18 +0300)
committerStephen Boyd <sboyd@kernel.org>
Fri, 18 Feb 2022 01:05:07 +0000 (17:05 -0800)
commit2f0754f27a230fee6e6d753f07585cee03bedfe3
treed6d3393c6e371ceab341b17e1f271e6b85129fb8
parent3494894afff4ad11f25d8342cc99699be496d082
clk: jz4725b: fix mmc0 clock gating

The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it  prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.

Fixes: 226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Tested-by: Siarhei Volkau <lis8215@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220205171849.687805-2-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ingenic/jz4725b-cgu.c